VVCE achieves milestone in indigenous chip design

Vidyavardhaka College of Engineering (VVCE), Mysuru, has achieved a milestone in semiconductor research and innovation with the successful completion of its PINAKA Academic Tapeout initiative, marking a significant step towards promoting indigenous chip design in the country’s engineering education ecosystem.

The chip, based on indigenous RISC-V architecture and developed using 65-nanometre technology, was successfully completed and submitted to Taiwan Semiconductor Manufacturing Company (TSMC) for tapeout on November 13.

The initiative marks an important step in providing engineering students and researchers with exposure to advanced semiconductor design and indigenous chip development.

The PINAKA initiative represents a significant achievement in promoting semiconductor design capabilities within academic institutions and strengthening industry–academia collaboration. The project was undertaken with the support of industry partners AstraSemi and KYROS SEMI, providing an important platform for advancing research, innovation and practical expertise in semiconductor technology.

Sadashive Gowda, principal, VVCE said the PINAKA initiative marked a milestone for the institution, demonstrating the potential of academic research and industry collaboration in semiconductor innovation, while inspiring students and faculty to contribute to India’s growing indigenous chip design ecosystem.

The milestone event was attended by members of the college management, representatives of AstraSemi and KYROS SEMI, principal and vice-principal of VVCE, Head of the Department of Electronics and Communication Engineering, and the principal investigator and co-principal investigator of the project.

The achievement is regarded as a significant initiative in the academic engineering ecosystem, highlighting the college’s contribution to indigenous semiconductor research, technology development and the nurturing of industry-ready engineering talent.